South KoreaSK hynix commits KRW 54.3T ($38.3B) to Yongin Y2 and Cheongju M17, expanding long-term DRAM and NAND capacity through 2031.
United StatesSpaceX and Tesla commit an initial $16.8B to the 100M-sq.-ft. Terafab semiconductor complex in Grimes County, Texas.
United States / GlobalSection 232 measures introduce minimum import prices for polysilicon and derivatives plus a 15% duty on covered derivative imports from 4 December 2026.
GlobalSamsung unveils 400+ layer V10 BV-NAND and new zHBM / zNAND-O concepts that push AI memory toward wafer-bonded, vertically integrated architectures.
GlobalSK hynix and Sandisk publish the first open HBF specification, defining up to 512GB per package and 0.4–3.0TB/s bandwidth for AI inference.
Semiconductor Manufacturing • Memory • AI Chips • Fab Expansion • Investment
SK hynix Commits KRW 54.3 Trillion to Yongin Y2 and Cheongju M17 Memory Fabs
August 7, 2026 | South Korea
SK hynix approved approximately KRW 54.3 trillion ($38.3 billion) of investment through 2031 for two new memory-fab projects in South Korea. About KRW 35.2 trillion will go to the Yongin Y2 fab, the second of four planned fabs at the Yongin semiconductor cluster, while KRW 19.1 trillion will go to the M17 fab in Cheongju. Y2 will produce DRAM products, including memory required by AI infrastructure, while M17 will manufacture NAND flash. Construction of Y2 is scheduled to begin in July 2027, with its first cleanroom targeted for June 2029; M17 construction is due to start in February 2027, with its first cleanroom targeted for December 2028. The investments execute SK hynix’s broader plans for KRW 600 trillion in Yongin and KRW 100 trillion in Cheongju. The company cited projected 19% CAGR for both DRAM and NAND demand through 2030. Process node, wafer diameter and exact wafer-start capacity were not disclosed.
Execution risk now shifts from capital approval to ramp discipline. Track whether M17’s December 2028 and Y2’s June 2029 cleanroom milestones translate into equipment move-in, qualification and product ramps that remain aligned with AI-led demand. A faster-than-market capacity build would improve supply security but could reopen the memory industry’s familiar pricing-cycle risk.
GreyRadius Insight
SK hynix is effectively placing a long-duration bet that AI will expand the total memory pool—not just HBM demand. That matters for equipment, materials and packaging suppliers because the opportunity broadens across DRAM and NAND. The strategic advantage will belong to producers that can add capacity while preserving mix, utilization and pricing power through the next memory cycle.
Semiconductor Manufacturing • AI Chips • Fab Expansion • Advanced Manufacturing • Investment
SpaceX and Tesla Commit an Initial $16.8 Billion to Texas Terafab AI-Chip Complex
August 6, 2026 | United States
SpaceX and Tesla announced an initial $16.8 billion investment in the Terafab semiconductor complex in Grimes County, Texas. The facility is planned at approximately 100 million square feet and is intended to integrate advanced logic and memory chip manufacturing, packaging and testing under one roof. The companies expect their future requirements to exceed 1 terawatt of computing power, making in-house semiconductor capacity strategically important for Tesla AI applications and SpaceX computing infrastructure. The project is expected to create at least 3,000 jobs. Reuters reported that future phases could lift total investment to as much as $119 billion, but that figure is an expansion scenario rather than currently committed capex. The qualifying development this week is the new $16.8B Grimes County commitment and project detail, not the earlier Terafab concept. Process node, committed wafer-start capacity and wafer diameter were not disclosed.
The $16.8B commitment is only the first proof point. The next signals are process-node disclosure, technology partners, tool orders, power and water commitments, packaging capability and a credible phased production schedule. These will show whether Terafab is becoming a manufacturable semiconductor platform or remains primarily a vertically integrated ambition.
GreyRadius Insight
Terafab introduces a different semiconductor demand model: the AI-system owner as a potential capacity owner. If the model scales, strategic buyers may increasingly secure compute through dedicated manufacturing ecosystems rather than spot component procurement. Foundries, OSATs and equipment vendors should prepare for larger, longer-duration partnerships built around capacity assurance, co-design and infrastructure integration.
United States Imposes Section 232 Protections on Polysilicon and Derivative Products
August 6, 2026 | United States / Global
The White House issued new Section 232 trade measures covering polysilicon and derivative products, a material chain relevant to semiconductor-grade silicon and solar manufacturing. The framework establishes minimum import prices of $21/kg for polysilicon and $100/kg for covered polysilicon ingots and wafers, alongside thresholds of $0.22/watt for solar cells and $0.38/watt for solar modules. Covered polysilicon derivative imports are also subject to an additional 15% ad valorem duty, subject to the proclamation’s detailed country and product provisions. The measures take effect on 4 December 2026. The administration also authorized mechanisms to support investment in domestic polysilicon and derivative production, positioning the policy as a supply-chain and national-security measure.
The December 4 effective date creates a near-term procurement decision window. Semiconductor-material buyers should map country-of-origin exposure, contract repricing and qualification alternatives before the new thresholds take effect. The most important follow-on signal will be whether protection translates into announced U.S. capacity—or simply raises input costs while domestic supply remains constrained.
GreyRadius Insight
The policy makes upstream material resilience an economic variable, not just a compliance issue. Companies that quantify the cost of geographic concentration now can make better sourcing and investment decisions before tariffs reshape landed-cost curves. For semiconductor supply chains, resilience premiums may increasingly be justified where they protect continuity, qualification stability and strategic-market access.
Samsung Unveils 400-Plus-Layer V10 BV-NAND and Vertically Integrated AI-Memory Concepts
August 5, 2026 | South Korea / United States / Global
Samsung Electronics used FMS 2026 in Santa Clara to unveil its next-generation V10 Bonding V-NAND (BV-NAND) with more than 400 layers. The wafer-bonding architecture increases memory density by approximately 58% versus V9. Samsung also presented zHBM and zNAND-O concepts designed to integrate memory more closely with AI accelerators. Samsung says the proposed zHBM architecture can achieve more than 10× the memory density of HBM5, approximately 3× energy efficiency, and reduce thermal resistance by more than 50%; its next-generation interface system is expected to deliver about 8× HBM5 performance. The direction is aimed at reducing data-movement, capacity and thermal bottlenecks in AI systems. Fab location, capex, wafer-start capacity, wafer size and a firm mass-production date for the new architectures were not disclosed.
The key milestone is no longer layer count alone. Watch when V10 BV-NAND enters production and whether Samsung can translate wafer bonding into competitive yield, cost and thermal performance at scale. For zHBM, customer sampling and accelerator integration will be more meaningful than headline density claims because qualification will determine whether vertical memory-on-accelerator architectures become commercially viable.
GreyRadius Insight
Samsung’s roadmap suggests the next memory contest will be fought at the system architecture level. As memory moves physically closer to compute, wafer bonding, thermal management and custom integration become sources of differentiation alongside DRAM and NAND process technology. That could shift value toward suppliers capable of co-optimizing memory, packaging and accelerator design rather than selling memory as a standalone component.
SK hynix and Sandisk Release First Open HBF Specification for AI Inference
August 4, 2026 | South Korea / United States / Global
SK hynix and Sandisk unveiled the first standard specifications for High Bandwidth Flash (HBF) through the Open Compute Project, defining a new memory tier between HBM and conventional SSD storage. The specification supports capacities of up to 512 GB per package using 8-high or 16-high NAND die stacks. Three performance grades span approximately 0.4 TB/s to 3.0 TB/s of bandwidth, while the architecture uses the UCIe chiplet interconnect standard. Google and Tenstorrent are participating in the HBF consortium, expanding the ecosystem beyond the two memory companies. SK hynix also unveiled its tenth-generation 375-layer 4D NAND, which it says improves power efficiency by 2.5×; high-performance enterprise SSDs using the technology are planned for mass production in early 2027. HBF targets AI-inference workloads needing more economical capacity than HBM while requiring far higher bandwidth than ordinary storage.
HBF’s commercial test is ecosystem adoption. Track UCIe interoperability, controller and processor support, product sampling and whether additional memory or accelerator vendors adopt the open specification. If HBF becomes multi-vendor rather than proprietary, it has a stronger chance of becoming a standard memory tier for capacity-heavy AI inference workloads.
GreyRadius Insight
HBF targets a structural gap in AI infrastructure: HBM offers bandwidth but at premium capacity economics, while SSDs offer capacity with much lower bandwidth. A successful middle tier could change how inference systems allocate models and data across the memory hierarchy. The opportunity therefore extends beyond NAND suppliers to chiplet, packaging, controller and accelerator companies that can design around this new tier.
Market Data & Intelligence
Metric
Latest Value
Publication Date
Region
Executive Implication
SK hynix Y2 + M17 approved investment
KRW 54.3T ($38.3B)
August 7, 2026
South Korea
Adds planned DRAM and NAND manufacturing capacity through 2031, with Y2 and M17 cleanrooms targeted for 2029 and 2028.
Yongin Y2 / Cheongju M17 allocation
KRW 35.2T / KRW 19.1T
August 7, 2026
South Korea
Shows capital split between advanced DRAM/HBM-oriented Yongin capacity and NAND-focused Cheongju expansion.
Terafab initial committed investment
$16.8B; ~100M sq. ft.; ≥3,000 jobs
August 6, 2026
United States
Moves Terafab from a broad concept toward a defined Texas manufacturing, packaging and test project.
Section 232 polysilicon MIP
$21/kg polysilicon; $100/kg ingots/wafers
August 6, 2026
United States / Global
Raises the strategic importance of upstream silicon sourcing, domestic production economics and trade treatment.
Covered polysilicon derivative duty
15%; effective 4 Dec 2026
August 6, 2026
United States / Global
Creates a near-term policy deadline for supply-chain, sourcing and investment decisions.
Samsung V10 BV-NAND
400+ layers; ~58% density uplift vs V9
August 5, 2026
Global
Demonstrates wafer bonding becoming central to next-generation NAND density and AI storage architecture.
Samsung zHBM concept
>10× HBM5 density; ~3× energy efficiency; >50% lower thermal resistance
August 5, 2026
Global
Signals deeper convergence of memory, wafer bonding and advanced packaging around AI accelerators.
Open HBF specification
Up to 512GB; 8/16-high stacks; 0.4–3.0TB/s; UCIe
August 4, 2026
Global
Defines a new memory tier aimed at AI inference workloads that need HBM-like bandwidth with NAND-class capacity economics.
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